MT90500AL

Product Summary

The MT90500AL is a multi-channel atm aal1 sar. The MT90500AL Multi-Channel AAL1 SAR is a highly integrated solution which allows systems based on a telecom bus to be interfaced to ATM networks using the MT90500AL Adaptation Layer 1 (AAL1), ATM Adaptation Layer 5 (AAL5) and the MT90500AL Adaptation Layer 0 (AAL0). The MT90500 can be connected directly to a ST BUS time division multiplexed (TDM) backplane containing up to 1024 full duplex 64kbps channels. Up to 1024 bi－directional the MT90500AL VC connections can be simultaneously processed by the MT90500 AAL1 SAR device. On the synchronous TDM bus side, the MT90500AL device interfaces with sixteen bidirectional ST-BUS serial links operating at 2.048, 4.096 or 8.192 Mbps. TDM bus compatibility with MVIP-90, H-MVIP, and SCSA interfaces is also provided.

Parametrics

MT90500AL absolute maximum ratings: (1)Supply Voltage －5 Volt Rail VDD5: －0.3, 6.5 V; (2)2 Supply Voltage －3.3 Volt Rail VDD3: －0.3, 3.9 V; (3)3 Voltage on any I/O pin (except TRISTATE)VI/O: VSS －0.5, VDD5 + 0.3 V; (4)4 Voltage on TRISTATE pin VI/O3: VSS －0.5, VDD3 + 0.3 V; (5)5 Continuous current at digital inputs IIN: ±10 mA; (6)6 Continuous current at digital outputs IO: ± 24 mA; (7)7 Storage Temperature TS: －40, + 125 °C; (8)8 Package power dissipation (PQFP)PD: 4 W.

Features

MT90500AL features: (1)AAL1 Segmentation and Reassembly device compatible with Structured Data Transfer (SDT)as per ANSI T1.630 and ITU I.363 standards; (2)Transports 64kbps and N x 64kbps traffic over ATM AAL1 cells (also over AAL5 or AAL0); (3)Simultaneous processing of up to 1024 bidirectional Virtual Circuits; (4)Flexible aggregation capabilities (Nx64)to allow any combination of 64 kbps channels while maintaining frame integrity (DS0 grooming); (5)Support for clock recovery Adaptive Clock Recovery, Synchronous Residual Time Stamp (SRTS), or external; (6)Primary UTOPIA port (Level 1, 25 MHz)for connection to external PHY devices with data throughput of up to 155 Mbps.

Diagrams